In the field of memory devices, a variety of memory technologies exist to serve as volatile and non volatile memories. One particular memory technology, known as Magnetic Random Access Memory (MRAM), is currently being developed and posses faster access times than some of the existing non volatile memory technologies.
An MRAM device typically comprises a matrix of MRAM cells, each cell comprising a Magnetic Tunnel Junction (MTJ) having a barrier layer of insulating material disposed between a first ferromagnetic layer and a second ferromagnetic layer. MRAM cells make use of so-called spin transport phenomena, in particular the tunnelling of electrons from the first ferromagnetic layer to the second ferromagnetic layer. In this respect, relative magnetic polarisations between the first and second ferromagnetic layers dictate the quantity of electrons that tunnel between the first and second ferromagnetic layers.
The above tunnelling currents, due the relative magnetisations of the first and second ferromagnetic layers, are characterised by a parameter known as “Tunnel MagnetoResistance” (TMR). For example, when the magnetization of the first ferromagnetic layer is in parallel with the magnetization of the second ferromagnetic layer, the resistance associated with such a parallel configuration is lower than a resistance associated with the magnetization between the first and second ferromagnetic layers being anti-parallel with respect to each other. The TMR quantifies the difference between the two resistance respectively associated with the above two states.
Consequently, a data bit can be stored in a given MRAM cell and retrieved therefrom by applying a potential difference across the given MRAM cell and making a comparison between the resulting current and a current known from a reference MRAM cell, the comparison of resistances corresponding to a comparison of resistances.
In practice, it is desirable to obtain as high a TMR value as possible when operating an MRAM cell in order to be able to use as large a difference of resistance between the two states as possible and hence improve performance of the MRAM cell, in particular access time.
An attempt to achieve maximum TMR is disclosed in “Spin-dependent tunnelling in magnetic tunnel junctions with Al2O3, MgO, NiO and hybrid structures” (L. Gabillet, B. Diouf, J. F. Bobo, D. Serrate, J. M. de Teresa, JMMM, Vol. 272-276, p. E1525-26, May 2004). This document relates, inter alia, to hybrid barriers formed from three sub-nanometric layers, but simply discloses that the thickness of the hybrid barrier impacts upon the quantum of the TMR.
Further, “Magnetic tunnel junctions with a zinc oxide—cobalt oxide composite tunnel barrier” (L. Le Brizoual, M. Hehn, E. Snoeck, F. Montaigne, M. Alnot, A. Schuhl, P. Alnot, (Applied Physics Letters 86, 112505 (2005)) discloses use of a Spin Dependent Tunnelling (SDT) cell as a rectifying diode. Instead of a single barrier layer, the SDT cell also comprises a hybrid barrier, but formed from two different layers of insulating materials. According to the authors of this cited document, the use of the hybrid barrier layers results in the SDT cell having an asymmetric potential barrier profile, as well as an asymmetric current vs. voltage characteristic and an asymmetric and shifted TMR vs. voltage characteristic.
Additionally, MRAM cells require a voltage bias to operate in order to maximise current variations and hence performance. However, in relation to the two cell structures described above, maximum TMR is typically obtained at zero bias voltage and then decreases when applied voltage increases or decreases. Hence, insufficient coincidence exists between a bias voltage required for operation of the MRAM cell and a maximum of the TMR characteristic of the MRAM cell and so optimum performance of the MRAM cell is not achieved.